
Imec, ASML, and TSMC integrated n-type and p-type 2D-material transistors on a single 300mm wafer at a 50nm contacted poly pitch, the tightest demonstrated for complementary 2D devices. 94% of transistors switched correctly with an on/off current ratio above 100,000. The work narrows the gap on p-type 2D CMOS performance.
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Huawei chip queen returns with new scaling law