Developing2 outlets · over 2 hours
IBM dual-ISA mainframe chip runs Arm, z/Architecture
IBM unveiled a dual-ISA mainframe processor at Hot Chips 2026 that natively executes both z/Architecture and AArch64 instructions, switching between them within nanoseconds. The 2nm chip has 11 cores at 5.7 GHz and supports 2,792 AArch64 instructions with SVE.
The story so far2 updates, latest first.
Tracked by ByteBrief